Si45 Hardware PoC - Cluster Execution Si45 Domain Specific Heterogeneous Compute The Fabric of Compute Needs To Be Reimagined WATCH DEMO Performance Recorded run · replay Si45 Hardware PoC - Cluster Execution TPC-DS Query #7 · 4 NODE CLUSTER · Spark 3.5.3 VS Executing TPC-DS Query #7. Both runs replayed side by side at their measured execution time. WATCH DEMO Watch the original recording Performance Performance Entire Framework Speedup Today identical Projected Today: 1.87X — Entire Framework Speedup Today. The computational load across the world’s data centers growing exponentially Every company is at its essence a data processor now All AI models require huge amounts of data processing to train and even more computational power to run 60%-80% of AI and Machine Learning is data preparation Slow Memory & CPU Centric Scheduling Both Need To Be Addressed! Three most persistent bottlenecks in modern computing are: Slow memory accessFLOPs scale exponentially while bandwidth and memory latency lag by orders of magnitude. The rigid CPU-centric scheduling modelsEvery workload forced through a legacy, sequential host bottleneck. Significant infrastructure cost:Global Data Center Power Will Quadruple To 250GW+ before 2030 REDEFINING THE ENTIRE FRAMEWORK A distributed dataflow-driven execution SW-HW framework Built-in automatic fault recovery, zero developer intervention Decentralized scheduling for true cluster-scale concurrency Peer-to-peer task execution with streaming between nodes Plug-and-play compatibility with APIs like Spark, Dask, Ray, Kdb+,... HIGHLY DEFENSIBLE TECHNOLOGY · 3 Issued Patents · 2 Pending Patents How it Works & Performs Data Shuffles: Multiple hops, thru-disk push-pull mechanism Bottlenecked CPU-Accelerator Architecture Frequent fall back to CPU (User Defined Functions) CENTRALIZED CPU CREATES BOTTLENECKS Enables a direct single hop peer-to-peer communication with autonomous accelerator cores API compatibility layer works with all existing frameworks Stream-based pipelining between worker nodes Hardware abstraction for CPUs, GPUs, Si45 FPGAs and Domain-Specific ASICs PEER-PEER COMMUNICATION REMOVES BOTTLENECKS More Than Individual Track Records, Our Core Team Bring 2-5 Overlapping Tenure Of Shared Execution To Silicon45. Shahrokh ShahidzadehCo-Founder | CEO Dr. Haitham AkkaryCo-Founder | CTO Pablo PerezEU Exec. Partner Steve SmithFormer CVP Intel Rohit VidwansCO-CEO Ampere Jim KaskadeFormer CEO Conversica Alex TraftonCISO Core42 Roy AlkheshenFounding Engineer Bashar AkkaryFounding Engineer Dr. A.KaitouaPrincipal Data Scientist 15X Chips: Designed, built, and GTM of 15 Intel and ARM-based CPUs and compute platforms 4X company founders 7X CEOs, 3X CTOs and EVPs of Engineering and Manufacturing Led Product and GTM at 7 SaaS companies 9 successful M&A exits 120+ Patents 60+ Scientific Publications Thank You! Shahrokh Shahidzadeh shahrokh@silicon45.com +1 971-244-3233